With some changes @ the XMega I implemented the last VIC2-details:
- VA14/VA15 inputs now @ Port R0, R1 (crystal-inputs) - I use the internal 32 oszillator with PLL
- display reset direct to VCC
now I have 3 new I/Os free:
- output enable for the LVT245 databuffer to the XMega
- direction of LVT245 combined with write to GAL (there added to write to RAM)
- IRQ with NPN transistor
Now some games like GORF, Jungle Hunt and DigDug are running and International Soccer starts (without players on the playfield?) ;-)
The rastercounter works exactly for every line!
I tested the rastercounter with some small assembler-routines like this (38 column mode):
Here is the timing @ the logic16:
- At first the Xmega sends RDY to the GAL (0)
- if R/W (1) is high the RDY goes to the CPU (2)
- after 3 us the CPU secure stops and the XMega sends AEC to the CPU-adressbuffer (3) and OE to his Xmega adressbuffers (4)
- Than he reads the rastercounter and sets the transistor (7) -> CPU-IRQ goes low (8)
- the Xmega disable the databuffer outputs (5), sets the write line to the GAL and the direction of the databuffers (6)
- than the controller enables the databuffers to write the IRQ-flag to the RAM (D019).
- now the XMega disables the databuffer-outputs (5) and disables the write/direction-signal (5).
I tried to set 5 and 6 at the same time high after writing, but than the system was unstable.
Now I disabled the outputs 30ns before end of write (negative data-holdtime) - but thats not a problem because of low cmos-loads the datalines are stable long enough!